[SMD] Tinylora PCB V2

PCB_SMD/Gerber_V2/LORA_ATTINY84-B_Mask.gbr

@@ -0,0 +1,544 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.5*
+G04 #@! TF.CreationDate,2020-01-23T21:18:07+01:00*
+G04 #@! TF.ProjectId,LORA_ATTINY84,4c4f5241-5f41-4545-9449-4e5938342e6b,rev?*
+G04 #@! TF.SameCoordinates,Original*
+G04 #@! TF.FileFunction,Soldermask,Bot*
+G04 #@! TF.FilePolarity,Negative*
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW 5.1.5) date 2020-01-23 21:18:07*
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PCB_SMD/Gerber_V2/LORA_ATTINY84-NPTH.drl

@@ -0,0 +1,13 @@
+M48
+; DRILL file {KiCad 5.1.5} date Do 23 Jan 2020 21:18:13 CET
+; FORMAT={-:-/ absolute / inch / decimal}
+; #@! TF.CreationDate,2020-01-23T21:18:13+01:00
+; #@! TF.GenerationSoftware,Kicad,Pcbnew,5.1.5
+; #@! TF.FileFunction,NonPlated,1,2,NPTH
+FMAT,2
+INCH
+%
+G90
+G05
+T0
+M30

PCB_SMD/Gerber_V2/LORA_ATTINY84-PTH.drl

@@ -0,0 +1,43 @@
+M48
+; DRILL file {KiCad 5.1.5} date Do 23 Jan 2020 21:18:13 CET
+; FORMAT={-:-/ absolute / inch / decimal}
+; #@! TF.CreationDate,2020-01-23T21:18:13+01:00
+; #@! TF.GenerationSoftware,Kicad,Pcbnew,5.1.5
+; #@! TF.FileFunction,Plated,1,2,PTH
+FMAT,2
+INCH
+T1C0.0157
+T2C0.0394
+%
+G90
+G05
+T1
+X2.631Y-2.49
+X2.6964Y-2.0185
+X2.8156Y-2.146
+X2.834Y-2.314
+X2.926Y-2.26
+X3.1324Y-2.059
+X3.169Y-2.196
+X3.1938Y-2.0459
+X3.231Y-2.241
+X3.392Y-2.179
+X3.392Y-2.452
+X3.424Y-2.0662
+T2
+X3.322Y-1.892
+X3.322Y-1.992
+X3.422Y-1.892
+X3.422Y-1.992
+X3.522Y-1.892
+X3.522Y-1.992
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+X3.522Y-2.341
+X3.522Y-2.441
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+X3.522Y-2.641
+X3.522Y-2.741
+X3.522Y-2.841
+T0
+M30

PCB_SMD/LORA_ATTINY84.sch

@@ -69,7 +69,7 @@ U 1 1 5D699DFD
 P 1500 1000
 F 0 "ANT1" H 1580 989 50  0000 L CNN
 F 1 "Antenna" H 1580 898 50  0000 L CNN
-F 2 "Connector_PinHeader_2.54mm:PinHeader_1x01_P2.54mm_Vertical" H 1500 1000 50  0001 C CNN
+F 2 "Connector_Coaxial:SMA_Samtec_SMA-J-P-X-ST-EM1_EdgeMount" H 1500 1000 50  0001 C CNN
 F 3 "~" H 1500 1000 50  0001 C CNN
 	1    1500 1000
 	1    0    0    -1  

PCB_SMD/LORA_ATTINY84.sch-bak

@@ -1,5 +1,4 @@
 EESchema Schematic File Version 4
-LIBS:LORA_ATTINY84-cache
 EELAYER 30 0
 EELAYER END
 $Descr A4 8268 11693 portrait
@@ -26,7 +25,7 @@ F 3 "" H 1900 4800 50  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L MCU_Microchip_ATtiny:ATtiny84A-SSU ATTiny84
+L LORA_ATTINY84-rescue:ATtiny84A-SSU-MCU_Microchip_ATtiny ATTiny84
 U 1 1 5D66342E
 P 1900 3900
 F 0 "ATTiny84" H 2050 4050 50  0000 R CNN
@@ -193,8 +192,6 @@ F 3 "" H 1100 1550 50  0001 C CNN
 	1    1100 1550
 	1    0    0    -1  
 $EndComp
-Wire Wire Line
-	1100 1550 1100 1700
 $Comp
 L power:+3V3 #PWR0107
 U 1 1 5D6F753F
@@ -381,4 +378,30 @@ Wire Wire Line
 	3350 3000 3650 3000
 Wire Wire Line
 	3650 3000 3650 2950
+$Comp
+L Device:R R2
+U 1 1 5E0CABAF
+P 950 1600
+F 0 "R2" V 1157 1600 50  0000 C CNN
+F 1 "47K" V 1066 1600 50  0000 C CNN
+F 2 "Resistor_SMD:R_1206_3216Metric_Pad1.42x1.75mm_HandSolder" V 880 1600 50  0001 C CNN
+F 3 "~" H 950 1600 50  0001 C CNN
+	1    950  1600
+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
+	1100 1550 1100 1600
+Connection ~ 1100 1600
+Wire Wire Line
+	1100 1600 1100 1700
+Wire Wire Line
+	800  1600 750  1600
+Wire Wire Line
+	750  1600 750  2500
+Wire Wire Line
+	750  2500 1900 2500
+Wire Wire Line
+	1900 2500 1900 2200
+Wire Wire Line
+	1900 2200 1800 2200
 $EndSCHEMATC