Initial Import
This commit is contained in:
commit
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26 changed files with 7421 additions and 0 deletions
3
.gitignore
vendored
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3
.gitignore
vendored
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*.sch-bak
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*.kicad_pcb-bak
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fp-info-cache
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27
Gerber/powerpack-B_Cu.gbr
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27
Gerber/powerpack-B_Cu.gbr
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%TF.GenerationSoftware,KiCad,Pcbnew,5.1.9*%
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%TF.CreationDate,2021-01-06T21:23:30+01:00*%
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%TF.ProjectId,powerpack,706f7765-7270-4616-936b-2e6b69636164,rev?*%
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%TF.SameCoordinates,Original*%
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%TF.FileFunction,Copper,L2,Bot*%
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%TF.FilePolarity,Positive*%
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%FSLAX46Y46*%
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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G04 Created by KiCad (PCBNEW 5.1.9) date 2021-01-06 21:23:30*
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%MOMM*%
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%LPD*%
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G01*
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G04 APERTURE LIST*
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%TA.AperFunction,ComponentPad*%
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%ADD10C,3.000000*%
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%TD*%
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G04 APERTURE END LIST*
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D10*
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%TO.P,J2.1,1*%
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%TO.N,+3V3*%
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X174942500Y-21907500D03*
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%TD*%
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%TO.P,J2.2,1*%
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%TO.N,GND*%
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X174942500Y-48895000D03*
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%TD*%
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M02*
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23
Gerber/powerpack-B_Mask.gbr
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23
Gerber/powerpack-B_Mask.gbr
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%TF.GenerationSoftware,KiCad,Pcbnew,5.1.9*%
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%TF.CreationDate,2021-01-06T21:23:30+01:00*%
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%TF.ProjectId,powerpack,706f7765-7270-4616-936b-2e6b69636164,rev?*%
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%TF.SameCoordinates,Original*%
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%TF.FileFunction,Soldermask,Bot*%
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%TF.FilePolarity,Negative*%
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%FSLAX46Y46*%
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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G04 Created by KiCad (PCBNEW 5.1.9) date 2021-01-06 21:23:30*
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%MOMM*%
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%LPD*%
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G01*
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G04 APERTURE LIST*
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%ADD10C,3.000000*%
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G04 APERTURE END LIST*
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D10*
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%TO.C,J2.1*%
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X174942500Y-21907500D03*
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%TD*%
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%TO.C,J2.2*%
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X174942500Y-48895000D03*
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%TD*%
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M02*
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15
Gerber/powerpack-B_Paste.gbr
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Gerber/powerpack-B_Paste.gbr
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%TF.GenerationSoftware,KiCad,Pcbnew,5.1.9*%
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%TF.CreationDate,2021-01-06T21:23:30+01:00*%
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%TF.ProjectId,powerpack,706f7765-7270-4616-936b-2e6b69636164,rev?*%
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%TF.SameCoordinates,Original*%
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%TF.FileFunction,Paste,Bot*%
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%TF.FilePolarity,Positive*%
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%FSLAX46Y46*%
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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G04 Created by KiCad (PCBNEW 5.1.9) date 2021-01-06 21:23:30*
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%MOMM*%
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%LPD*%
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G01*
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G04 APERTURE LIST*
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G04 APERTURE END LIST*
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M02*
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2266
Gerber/powerpack-B_SilkS.gbr
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Gerber/powerpack-B_SilkS.gbr
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44
Gerber/powerpack-Edge_Cuts.gbr
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Gerber/powerpack-Edge_Cuts.gbr
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%TF.GenerationSoftware,KiCad,Pcbnew,5.1.9*%
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%TF.CreationDate,2021-01-06T21:23:30+01:00*%
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%TF.ProjectId,powerpack,706f7765-7270-4616-936b-2e6b69636164,rev?*%
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%TF.SameCoordinates,Original*%
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%TF.FileFunction,Profile,NP*%
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%FSLAX46Y46*%
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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G04 Created by KiCad (PCBNEW 5.1.9) date 2021-01-06 21:23:30*
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%MOMM*%
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%LPD*%
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G01*
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G04 APERTURE LIST*
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%TA.AperFunction,Profile*%
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%ADD10C,0.100000*%
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%TD*%
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G04 APERTURE END LIST*
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D10*
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X172618400Y-23952200D02*
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X168275000Y-23952200D01*
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M02*
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1457
Gerber/powerpack-F_Cu.gbr
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Gerber/powerpack-F_Cu.gbr
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Gerber/powerpack-F_Mask.gbr
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Gerber/powerpack-F_Mask.gbr
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%TF.GenerationSoftware,KiCad,Pcbnew,5.1.9*%
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%TF.CreationDate,2021-01-06T21:23:30+01:00*%
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%TF.ProjectId,powerpack,706f7765-7270-4616-936b-2e6b69636164,rev?*%
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%TF.SameCoordinates,Original*%
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%TF.FileFunction,Soldermask,Top*%
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%TF.FilePolarity,Negative*%
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%FSLAX46Y46*%
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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G04 Created by KiCad (PCBNEW 5.1.9) date 2021-01-06 21:23:30*
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%MOMM*%
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%LPD*%
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G01*
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G04 APERTURE LIST*
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%ADD10C,3.000000*%
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%ADD11R,1.380000X0.600000*%
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%ADD12R,2.500000X2.500000*%
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G04 APERTURE END LIST*
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D10*
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%TO.C,J2.1*%
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X174942500Y-21907500D03*
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%TD*%
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D11*
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%TO.C,U1*%
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%TD*%
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%TO.C,C1*%
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G36*
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G01*
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Gerber/powerpack-F_Paste.gbr
Normal file
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Normal file
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X180349997Y-28281200I249997J0D01*
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G01*
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G37*
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||||||
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%TD*%
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G36*
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G01*
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G75*
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X181692400Y-33845600I150000J0D01*
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%TD*%
|
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M02*
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1139
Gerber/powerpack-F_SilkS.gbr
Normal file
1139
Gerber/powerpack-F_SilkS.gbr
Normal file
File diff suppressed because it is too large
Load diff
128
Gerber/powerpack-job.gbrjob
Normal file
128
Gerber/powerpack-job.gbrjob
Normal file
|
|
@ -0,0 +1,128 @@
|
||||||
|
{
|
||||||
|
"Header":
|
||||||
|
{
|
||||||
|
"GenerationSoftware":
|
||||||
|
{
|
||||||
|
"Vendor": "KiCad",
|
||||||
|
"Application": "Pcbnew",
|
||||||
|
"Version": "5.1.9"
|
||||||
|
},
|
||||||
|
"CreationDate": "2021-01-06T21:23:30+01:00"
|
||||||
|
},
|
||||||
|
"GeneralSpecs":
|
||||||
|
{
|
||||||
|
"ProjectId":
|
||||||
|
{
|
||||||
|
"Name": "powerpack",
|
||||||
|
"GUID": "706f7765-7270-4616-936b-2e6b69636164",
|
||||||
|
"Revision": "rev?"
|
||||||
|
},
|
||||||
|
"Size":
|
||||||
|
{
|
||||||
|
"X": 16.991,
|
||||||
|
"Y": 32.968
|
||||||
|
},
|
||||||
|
"LayerNumber": 2,
|
||||||
|
"BoardThickness": 1.600
|
||||||
|
},
|
||||||
|
"DesignRules":
|
||||||
|
[
|
||||||
|
{
|
||||||
|
"Layers": "Outer",
|
||||||
|
"PadToPad": 0.200,
|
||||||
|
"PadToTrack": 0.200,
|
||||||
|
"TrackToTrack": 0.200,
|
||||||
|
"MinLineWidth": 0.250,
|
||||||
|
"TrackToRegion": 0.508,
|
||||||
|
"RegionToRegion": 0.508
|
||||||
|
}
|
||||||
|
],
|
||||||
|
"FilesAttributes":
|
||||||
|
[
|
||||||
|
{
|
||||||
|
"Path": "powerpack-F_Cu.gbr",
|
||||||
|
"FileFunction": "Copper,L1,Top",
|
||||||
|
"FilePolarity": "Positive"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"Path": "powerpack-B_Cu.gbr",
|
||||||
|
"FileFunction": "Copper,L2,Bot",
|
||||||
|
"FilePolarity": "Positive"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"Path": "powerpack-F_Paste.gbr",
|
||||||
|
"FileFunction": "SolderPaste,Top",
|
||||||
|
"FilePolarity": "Positive"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"Path": "powerpack-B_Paste.gbr",
|
||||||
|
"FileFunction": "SolderPaste,Bot",
|
||||||
|
"FilePolarity": "Positive"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"Path": "powerpack-F_SilkS.gbr",
|
||||||
|
"FileFunction": "Legend,Top",
|
||||||
|
"FilePolarity": "Positive"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"Path": "powerpack-B_SilkS.gbr",
|
||||||
|
"FileFunction": "Legend,Bot",
|
||||||
|
"FilePolarity": "Positive"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"Path": "powerpack-F_Mask.gbr",
|
||||||
|
"FileFunction": "SolderMask,Top",
|
||||||
|
"FilePolarity": "Negative"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"Path": "powerpack-B_Mask.gbr",
|
||||||
|
"FileFunction": "SolderMask,Bot",
|
||||||
|
"FilePolarity": "Negative"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"Path": "powerpack-Edge_Cuts.gbr",
|
||||||
|
"FileFunction": "Profile",
|
||||||
|
"FilePolarity": "Positive"
|
||||||
|
}
|
||||||
|
],
|
||||||
|
"MaterialStackup":
|
||||||
|
[
|
||||||
|
{
|
||||||
|
"Type": "Legend",
|
||||||
|
"Notes": "Layer F.SilkS"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"Type": "SolderPaste",
|
||||||
|
"Notes": "Layer F.Paste"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"Type": "SolderMask",
|
||||||
|
"Notes": "Layer F.Mask"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"Type": "Copper",
|
||||||
|
"Notes": "Layer F.Cu"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"Type": "Dielectric",
|
||||||
|
"Material": "FR4",
|
||||||
|
"Notes": "Layers L1/L2"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"Type": "Copper",
|
||||||
|
"Notes": "Layer B.Cu"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"Type": "SolderMask",
|
||||||
|
"Notes": "Layer B.Mask"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"Type": "SolderPaste",
|
||||||
|
"Notes": "Layer B.Paste"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"Type": "Legend",
|
||||||
|
"Notes": "Layer B.SilkS"
|
||||||
|
}
|
||||||
|
]
|
||||||
|
}
|
||||||
16
Gerber/powerpack.drl
Normal file
16
Gerber/powerpack.drl
Normal file
|
|
@ -0,0 +1,16 @@
|
||||||
|
M48
|
||||||
|
; DRILL file {KiCad 5.1.9} date Wed Jan 6 21:23:33 2021
|
||||||
|
; FORMAT={-:-/ absolute / inch / decimal}
|
||||||
|
; #@! TF.CreationDate,2021-01-06T21:23:33+01:00
|
||||||
|
; #@! TF.GenerationSoftware,Kicad,Pcbnew,5.1.9
|
||||||
|
FMAT,2
|
||||||
|
INCH
|
||||||
|
T1C0.0787
|
||||||
|
%
|
||||||
|
G90
|
||||||
|
G05
|
||||||
|
T1
|
||||||
|
X6.8875Y-0.8625
|
||||||
|
X6.8875Y-1.925
|
||||||
|
T0
|
||||||
|
M30
|
||||||
52
footprints/Logo/Logo_druck.kicad_mod
Normal file
52
footprints/Logo/Logo_druck.kicad_mod
Normal file
|
|
@ -0,0 +1,52 @@
|
||||||
|
(module LOGO (layer F.Cu)
|
||||||
|
(at 0 0)
|
||||||
|
(fp_text reference "G***" (at 0 0) (layer F.SilkS) hide
|
||||||
|
(effects (font (thickness 0.3)))
|
||||||
|
)
|
||||||
|
(fp_text value "LOGO" (at 0.75 0) (layer F.SilkS) hide
|
||||||
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||||||
|
(fp_poly (pts (xy 2.138947 1.737895) (xy 2.005263 1.871579) (xy 1.871578 1.737895) (xy 2.005263 1.604210) (xy 2.138947 1.737895) )(layer Eco2.User) (width 0.010000)
|
||||||
|
)
|
||||||
|
)
|
||||||
BIN
footprints/Logo/attnode.odg
Normal file
BIN
footprints/Logo/attnode.odg
Normal file
Binary file not shown.
25
footprints/MCP1703T-3302E_CB/MCP1703T-3302E_CB.lib
Normal file
25
footprints/MCP1703T-3302E_CB/MCP1703T-3302E_CB.lib
Normal file
|
|
@ -0,0 +1,25 @@
|
||||||
|
EESchema-LIBRARY Version 2.3
|
||||||
|
#encoding utf-8
|
||||||
|
#(c) SnapEDA 2016 (snapeda.com)
|
||||||
|
#This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0
|
||||||
|
#
|
||||||
|
# MCP1703T-3302E/CB
|
||||||
|
#
|
||||||
|
DEF MCP1703T-3302E/CB U 0 40 Y Y 1 L N
|
||||||
|
F0 "U" -400 225 50 H V L BNN
|
||||||
|
F1 "MCP1703T-3302E/CB" -400 -300 50 H V L BNN
|
||||||
|
F2 "SOT95P255X145-3N" 0 0 50 H I L BNN
|
||||||
|
F3 "" 0 0 50 H I L BNN
|
||||||
|
F4 "Microchip" 0 0 50 H I L BNN "MANUFACTURER"
|
||||||
|
F5 "F" 0 0 50 H I L BNN "PARTREV"
|
||||||
|
F6 "IPC 7351B" 0 0 50 H I L BNN "STANDARD"
|
||||||
|
F7 "1.45 mm" 0 0 50 H I L BNN "MAXIMUM_PACKAGE_HEIGHT"
|
||||||
|
DRAW
|
||||||
|
S -400 -200 400 200 0 0 10 f
|
||||||
|
X VIN 3 -600 100 200 R 40 40 0 0 I
|
||||||
|
X GND 1 600 -100 200 L 40 40 0 0 W
|
||||||
|
X VOUT 2 600 100 200 L 40 40 0 0 O
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# End Library
|
||||||
27
footprints/MCP1703T-3302E_CB/SOT95P255X145-3N.kicad_mod
Normal file
27
footprints/MCP1703T-3302E_CB/SOT95P255X145-3N.kicad_mod
Normal file
|
|
@ -0,0 +1,27 @@
|
||||||
|
|
||||||
|
(module SOT95P255X145-3N (layer F.Cu) (tedit 5FCB8903)
|
||||||
|
(descr "")
|
||||||
|
(fp_text reference REF** (at 0.175 -2.635 0) (layer F.SilkS)
|
||||||
|
(effects (font (size 1.0 1.0) (thickness 0.015)))
|
||||||
|
)
|
||||||
|
(fp_text value SOT95P255X145-3N (at 7.16 2.635 0) (layer F.Fab)
|
||||||
|
(effects (font (size 1.0 1.0) (thickness 0.015)))
|
||||||
|
)
|
||||||
|
(fp_line (start -0.75 -1.45) (end -0.75 1.45) (layer F.Fab) (width 0.127))
|
||||||
|
(fp_line (start -0.75 1.45) (end 0.75 1.45) (layer F.Fab) (width 0.127))
|
||||||
|
(fp_line (start 0.75 1.45) (end 0.75 -1.45) (layer F.Fab) (width 0.127))
|
||||||
|
(fp_line (start 0.75 -1.45) (end -0.75 -1.45) (layer F.Fab) (width 0.127))
|
||||||
|
(fp_line (start 0.75 -0.62) (end 0.75 -1.57) (layer F.SilkS) (width 0.127))
|
||||||
|
(fp_line (start -0.75 1.57) (end 0.75 1.57) (layer F.SilkS) (width 0.127))
|
||||||
|
(fp_line (start 0.75 1.57) (end 0.75 0.62) (layer F.SilkS) (width 0.127))
|
||||||
|
(fp_line (start 0.75 -1.57) (end -0.75 -1.57) (layer F.SilkS) (width 0.127))
|
||||||
|
(fp_line (start -2.105 -1.7) (end 2.105 -1.7) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start 2.105 -1.7) (end 2.105 1.7) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start 2.105 1.7) (end -2.105 1.7) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start -2.105 1.7) (end -2.105 -1.7) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_circle (center -2.5 -1.2) (end -2.4 -1.2) (layer F.SilkS) (width 0.2))
|
||||||
|
(fp_circle (center -2.5 -1.2) (end -2.4 -1.2) (layer F.Fab) (width 0.2))
|
||||||
|
(pad 1 smd rect (at -1.165 -0.95) (size 1.38 0.6) (layers F.Cu F.Mask F.Paste))
|
||||||
|
(pad 2 smd rect (at -1.165 0.95) (size 1.38 0.6) (layers F.Cu F.Mask F.Paste))
|
||||||
|
(pad 3 smd rect (at 1.165 0.0) (size 1.38 0.6) (layers F.Cu F.Mask F.Paste))
|
||||||
|
)
|
||||||
1
footprints/MCP1703T-3302E_CB/how-to-import.htm
Normal file
1
footprints/MCP1703T-3302E_CB/how-to-import.htm
Normal file
|
|
@ -0,0 +1 @@
|
||||||
|
<!DOCTYPE HTML><html lang="en-US"> <head> <meta charset="UTF-8"> <meta http-equiv="refresh" content="0; url=https://www.snapeda.com/about/import/#"> <script type="text/javascript">window.location.href="https://www.snapeda.com/about/import/#" </script> <title>Page Redirection</title> </head> <body> If you are not redirected automatically, follow this <a href="https://www.snapeda.com/about/import/#">link to the import guide</a>. </body></html>
|
||||||
3
fp-lib-table
Normal file
3
fp-lib-table
Normal file
|
|
@ -0,0 +1,3 @@
|
||||||
|
(fp_lib_table
|
||||||
|
(lib (name MCP1703T-3302E_CB)(type KiCad)(uri ${KIPRJMOD}/footprints/MCP1703T-3302E_CB)(options "")(descr ""))
|
||||||
|
)
|
||||||
135
powerpack-cache.lib
Normal file
135
powerpack-cache.lib
Normal file
|
|
@ -0,0 +1,135 @@
|
||||||
|
EESchema-LIBRARY Version 2.4
|
||||||
|
#encoding utf-8
|
||||||
|
#
|
||||||
|
# Connector_Conn_01x01_Female
|
||||||
|
#
|
||||||
|
DEF Connector_Conn_01x01_Female J 0 40 Y N 1 F N
|
||||||
|
F0 "J" 0 100 50 H V C CNN
|
||||||
|
F1 "Connector_Conn_01x01_Female" 0 -100 50 H V C CNN
|
||||||
|
F2 "" 0 0 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
$FPLIST
|
||||||
|
Connector*:*
|
||||||
|
$ENDFPLIST
|
||||||
|
DRAW
|
||||||
|
A 0 0 20 901 -901 1 1 6 N 0 20 0 -20
|
||||||
|
P 2 1 1 6 -50 0 -20 0 N
|
||||||
|
X Pin_1 1 -200 0 150 R 50 50 1 1 P
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# Connector_Conn_01x02_Male
|
||||||
|
#
|
||||||
|
DEF Connector_Conn_01x02_Male J 0 40 Y N 1 F N
|
||||||
|
F0 "J" 0 100 50 H V C CNN
|
||||||
|
F1 "Connector_Conn_01x02_Male" 0 -200 50 H V C CNN
|
||||||
|
F2 "" 0 0 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
$FPLIST
|
||||||
|
Connector*:*_1x??_*
|
||||||
|
$ENDFPLIST
|
||||||
|
DRAW
|
||||||
|
S 34 -95 0 -105 1 1 6 F
|
||||||
|
S 34 5 0 -5 1 1 6 F
|
||||||
|
P 2 1 1 6 50 -100 34 -100 N
|
||||||
|
P 2 1 1 6 50 0 34 0 N
|
||||||
|
X Pin_1 1 200 0 150 L 50 50 1 1 P
|
||||||
|
X Pin_2 2 200 -100 150 L 50 50 1 1 P
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# Device_C
|
||||||
|
#
|
||||||
|
DEF Device_C C 0 10 N Y 1 F N
|
||||||
|
F0 "C" 25 100 50 H V L CNN
|
||||||
|
F1 "Device_C" 25 -100 50 H V L CNN
|
||||||
|
F2 "" 38 -150 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
$FPLIST
|
||||||
|
C_*
|
||||||
|
$ENDFPLIST
|
||||||
|
DRAW
|
||||||
|
P 2 0 1 20 -80 -30 80 -30 N
|
||||||
|
P 2 0 1 20 -80 30 80 30 N
|
||||||
|
X ~ 1 0 150 110 D 50 50 1 1 P
|
||||||
|
X ~ 2 0 -150 110 U 50 50 1 1 P
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# MCP1703_MCP1703T-3302E_CB
|
||||||
|
#
|
||||||
|
DEF MCP1703_MCP1703T-3302E_CB U 0 40 Y Y 1 L N
|
||||||
|
F0 "U" -400 225 50 H V L BNN
|
||||||
|
F1 "MCP1703_MCP1703T-3302E_CB" -400 -300 50 H V L BNN
|
||||||
|
F2 "SOT95P255X145-3N" 0 0 50 H I L BNN
|
||||||
|
F3 "" 0 0 50 H I L BNN
|
||||||
|
F4 "Microchip" 0 0 50 H I L BNN "MANUFACTURER"
|
||||||
|
F5 "F" 0 0 50 H I L BNN "PARTREV"
|
||||||
|
F6 "IPC 7351B" 0 0 50 H I L BNN "STANDARD"
|
||||||
|
F7 "1.45 mm" 0 0 50 H I L BNN "MAXIMUM_PACKAGE_HEIGHT"
|
||||||
|
DRAW
|
||||||
|
S -400 -200 400 200 0 0 10 f
|
||||||
|
X GND 1 600 -100 200 L 40 40 0 0 W
|
||||||
|
X VOUT 2 600 100 200 L 40 40 0 0 O
|
||||||
|
X VIN 3 -600 100 200 R 40 40 0 0 I
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# power_+3.3V
|
||||||
|
#
|
||||||
|
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
|
||||||
|
F0 "#PWR" 0 -150 50 H I C CNN
|
||||||
|
F1 "power_+3.3V" 0 140 50 H V C CNN
|
||||||
|
F2 "" 0 0 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
ALIAS +3.3V
|
||||||
|
DRAW
|
||||||
|
P 2 0 1 0 -30 50 0 100 N
|
||||||
|
P 2 0 1 0 0 0 0 100 N
|
||||||
|
P 2 0 1 0 0 100 30 50 N
|
||||||
|
X +3V3 1 0 0 0 U 50 50 1 1 W N
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# power_GND
|
||||||
|
#
|
||||||
|
DEF power_GND #PWR 0 0 Y Y 1 F P
|
||||||
|
F0 "#PWR" 0 -250 50 H I C CNN
|
||||||
|
F1 "power_GND" 0 -150 50 H V C CNN
|
||||||
|
F2 "" 0 0 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
DRAW
|
||||||
|
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||||
|
X GND 1 0 0 0 D 50 50 1 1 W N
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# power_PWR_FLAG
|
||||||
|
#
|
||||||
|
DEF power_PWR_FLAG #FLG 0 0 N N 1 F P
|
||||||
|
F0 "#FLG" 0 75 50 H I C CNN
|
||||||
|
F1 "power_PWR_FLAG" 0 150 50 H V C CNN
|
||||||
|
F2 "" 0 0 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
DRAW
|
||||||
|
P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
|
||||||
|
X pwr 1 0 0 0 U 50 50 0 0 w
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# power_VCC
|
||||||
|
#
|
||||||
|
DEF power_VCC #PWR 0 0 Y Y 1 F P
|
||||||
|
F0 "#PWR" 0 -150 50 H I C CNN
|
||||||
|
F1 "power_VCC" 0 150 50 H V C CNN
|
||||||
|
F2 "" 0 0 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
DRAW
|
||||||
|
P 2 0 1 0 -30 50 0 100 N
|
||||||
|
P 2 0 1 0 0 0 0 100 N
|
||||||
|
P 2 0 1 0 0 100 30 50 N
|
||||||
|
X VCC 1 0 0 0 U 50 50 1 1 W N
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
#End Library
|
||||||
921
powerpack.kicad_pcb
Normal file
921
powerpack.kicad_pcb
Normal file
|
|
@ -0,0 +1,921 @@
|
||||||
|
(kicad_pcb (version 20171130) (host pcbnew 5.1.9)
|
||||||
|
|
||||||
|
(general
|
||||||
|
(thickness 1.6)
|
||||||
|
(drawings 19)
|
||||||
|
(tracks 29)
|
||||||
|
(zones 0)
|
||||||
|
(modules 10)
|
||||||
|
(nets 4)
|
||||||
|
)
|
||||||
|
|
||||||
|
(page A4)
|
||||||
|
(layers
|
||||||
|
(0 F.Cu signal)
|
||||||
|
(31 B.Cu signal)
|
||||||
|
(32 B.Adhes user)
|
||||||
|
(33 F.Adhes user)
|
||||||
|
(34 B.Paste user)
|
||||||
|
(35 F.Paste user)
|
||||||
|
(36 B.SilkS user)
|
||||||
|
(37 F.SilkS user)
|
||||||
|
(38 B.Mask user)
|
||||||
|
(39 F.Mask user)
|
||||||
|
(40 Dwgs.User user)
|
||||||
|
(41 Cmts.User user)
|
||||||
|
(42 Eco1.User user)
|
||||||
|
(43 Eco2.User user)
|
||||||
|
(44 Edge.Cuts user)
|
||||||
|
(45 Margin user)
|
||||||
|
(46 B.CrtYd user)
|
||||||
|
(47 F.CrtYd user)
|
||||||
|
(48 B.Fab user)
|
||||||
|
(49 F.Fab user)
|
||||||
|
)
|
||||||
|
|
||||||
|
(setup
|
||||||
|
(last_trace_width 0.25)
|
||||||
|
(trace_clearance 0.2)
|
||||||
|
(zone_clearance 0.508)
|
||||||
|
(zone_45_only no)
|
||||||
|
(trace_min 0.2)
|
||||||
|
(via_size 0.8)
|
||||||
|
(via_drill 0.4)
|
||||||
|
(via_min_size 0.4)
|
||||||
|
(via_min_drill 0.3)
|
||||||
|
(uvia_size 0.3)
|
||||||
|
(uvia_drill 0.1)
|
||||||
|
(uvias_allowed no)
|
||||||
|
(uvia_min_size 0.2)
|
||||||
|
(uvia_min_drill 0.1)
|
||||||
|
(edge_width 0.1)
|
||||||
|
(segment_width 0.2)
|
||||||
|
(pcb_text_width 0.3)
|
||||||
|
(pcb_text_size 1.5 1.5)
|
||||||
|
(mod_edge_width 0.15)
|
||||||
|
(mod_text_size 1 1)
|
||||||
|
(mod_text_width 0.15)
|
||||||
|
(pad_size 1.524 1.524)
|
||||||
|
(pad_drill 0.762)
|
||||||
|
(pad_to_mask_clearance 0)
|
||||||
|
(aux_axis_origin 0 0)
|
||||||
|
(visible_elements 7FFFFFFF)
|
||||||
|
(pcbplotparams
|
||||||
|
(layerselection 0x010fc_ffffffff)
|
||||||
|
(usegerberextensions false)
|
||||||
|
(usegerberattributes true)
|
||||||
|
(usegerberadvancedattributes true)
|
||||||
|
(creategerberjobfile true)
|
||||||
|
(excludeedgelayer true)
|
||||||
|
(linewidth 0.100000)
|
||||||
|
(plotframeref false)
|
||||||
|
(viasonmask false)
|
||||||
|
(mode 1)
|
||||||
|
(useauxorigin false)
|
||||||
|
(hpglpennumber 1)
|
||||||
|
(hpglpenspeed 20)
|
||||||
|
(hpglpendiameter 15.000000)
|
||||||
|
(psnegative false)
|
||||||
|
(psa4output false)
|
||||||
|
(plotreference true)
|
||||||
|
(plotvalue true)
|
||||||
|
(plotinvisibletext false)
|
||||||
|
(padsonsilk false)
|
||||||
|
(subtractmaskfromsilk false)
|
||||||
|
(outputformat 1)
|
||||||
|
(mirror false)
|
||||||
|
(drillshape 0)
|
||||||
|
(scaleselection 1)
|
||||||
|
(outputdirectory "Gerber/"))
|
||||||
|
)
|
||||||
|
|
||||||
|
(net 0 "")
|
||||||
|
(net 1 GND)
|
||||||
|
(net 2 VCC)
|
||||||
|
(net 3 +3V3)
|
||||||
|
|
||||||
|
(net_class Default "Dies ist die voreingestellte Netzklasse."
|
||||||
|
(clearance 0.2)
|
||||||
|
(trace_width 0.25)
|
||||||
|
(via_dia 0.8)
|
||||||
|
(via_drill 0.4)
|
||||||
|
(uvia_dia 0.3)
|
||||||
|
(uvia_drill 0.1)
|
||||||
|
(add_net +3V3)
|
||||||
|
(add_net GND)
|
||||||
|
(add_net VCC)
|
||||||
|
)
|
||||||
|
|
||||||
|
(module TestPoint:TestPoint_Plated_Hole_D2.0mm (layer F.Cu) (tedit 5A0F774F) (tstamp 5FF6768C)
|
||||||
|
(at 174.9425 21.9075)
|
||||||
|
(descr "Plated Hole as test Point, diameter 2.0mm")
|
||||||
|
(tags "test point plated hole")
|
||||||
|
(path /5FAC7D6D)
|
||||||
|
(attr virtual)
|
||||||
|
(fp_text reference J2.1 (at 0 -2.498) (layer F.SilkS) hide
|
||||||
|
(effects (font (size 1 1) (thickness 0.15)))
|
||||||
|
)
|
||||||
|
(fp_text value "Vout +3.3V" (at 0 2.45) (layer F.Fab) hide
|
||||||
|
(effects (font (size 1 1) (thickness 0.15)))
|
||||||
|
)
|
||||||
|
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(fp_poly (pts (xy -3.175028 3.274671) (xy -2.965626 3.587178) (xy -2.941053 4.010526) (xy -3.007304 4.578657)
|
||||||
|
(xy -3.319811 4.788059) (xy -3.743158 4.812632) (xy -4.311289 4.746381) (xy -4.520691 4.433874)
|
||||||
|
(xy -4.545264 4.010526) (xy -4.542926 3.990474) (xy -3.959281 3.990474) (xy -3.830217 4.234271)
|
||||||
|
(xy -3.609474 4.277895) (xy -3.276715 4.142232) (xy -3.259667 3.990474) (xy -3.535693 3.714239)
|
||||||
|
(xy -3.609474 3.703053) (xy -3.922973 3.911204) (xy -3.959281 3.990474) (xy -4.542926 3.990474)
|
||||||
|
(xy -4.479013 3.442395) (xy -4.166506 3.232994) (xy -3.743158 3.208421) (xy -3.175028 3.274671)) (layer F.SilkS) (width 0.01))
|
||||||
|
)
|
||||||
|
|
||||||
|
(module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 5FBEEA0E)
|
||||||
|
(at 181 42.9768 270)
|
||||||
|
(descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
|
||||||
|
(tags "capacitor handsolder")
|
||||||
|
(path /5FAAF5EB)
|
||||||
|
(attr smd)
|
||||||
|
(fp_text reference C1 (at 0.1016 3.175 90) (layer F.SilkS)
|
||||||
|
(effects (font (size 1 1) (thickness 0.15)))
|
||||||
|
)
|
||||||
|
(fp_text value 1uF (at 0 1.85 90) (layer F.SilkS)
|
||||||
|
(effects (font (size 1 1) (thickness 0.15) italic))
|
||||||
|
)
|
||||||
|
(fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
|
||||||
|
(fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
|
||||||
|
(fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
|
||||||
|
(fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
|
||||||
|
(fp_text user %R (at 0 0 90) (layer F.Fab)
|
||||||
|
(effects (font (size 0.8 0.8) (thickness 0.12)))
|
||||||
|
)
|
||||||
|
(pad 2 smd roundrect (at 1.5625 0 270) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1886769811320755)
|
||||||
|
(net 1 GND))
|
||||||
|
(pad 1 smd roundrect (at -1.5625 0 270) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1886769811320755)
|
||||||
|
(net 2 VCC))
|
||||||
|
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl
|
||||||
|
(at (xyz 0 0 0))
|
||||||
|
(scale (xyz 1 1 1))
|
||||||
|
(rotate (xyz 0 0 0))
|
||||||
|
)
|
||||||
|
)
|
||||||
|
|
||||||
|
(module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 5FBEEA1F)
|
||||||
|
(at 181 27.3812 270)
|
||||||
|
(descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
|
||||||
|
(tags "capacitor handsolder")
|
||||||
|
(path /5FAB0019)
|
||||||
|
(attr smd)
|
||||||
|
(fp_text reference C2 (at -0.1016 3.2766 90) (layer F.SilkS)
|
||||||
|
(effects (font (size 1 1) (thickness 0.15)))
|
||||||
|
)
|
||||||
|
(fp_text value 1uF (at 0 1.85 90) (layer F.SilkS)
|
||||||
|
(effects (font (size 1 1) (thickness 0.15) italic))
|
||||||
|
)
|
||||||
|
(fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
|
||||||
|
(fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
|
||||||
|
(fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
|
||||||
|
(fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
|
||||||
|
(fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_text user %R (at -1.6764 0.0508 90) (layer F.Fab)
|
||||||
|
(effects (font (size 0.8 0.8) (thickness 0.12)))
|
||||||
|
)
|
||||||
|
(pad 1 smd roundrect (at -1.5625 0 270) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1886769811320755)
|
||||||
|
(net 3 +3V3))
|
||||||
|
(pad 2 smd roundrect (at 1.5625 0 270) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1886769811320755)
|
||||||
|
(net 1 GND))
|
||||||
|
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl
|
||||||
|
(at (xyz 0 0 0))
|
||||||
|
(scale (xyz 1 1 1))
|
||||||
|
(rotate (xyz 0 0 0))
|
||||||
|
)
|
||||||
|
)
|
||||||
|
|
||||||
|
(module Connector_JST:JST_SHL_SM02B-SHLS-TF_1x02-1MP_P1.00mm_Horizontal (layer F.Cu) (tedit 5B78AD87) (tstamp 5FBEEA3A)
|
||||||
|
(at 180.4924 34.6456 270)
|
||||||
|
(descr "JST SHL series connector, SM02B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator")
|
||||||
|
(tags "connector JST SHL top entry")
|
||||||
|
(path /5FAC5355)
|
||||||
|
(attr smd)
|
||||||
|
(fp_text reference J1 (at 0 -3.5 90) (layer F.SilkS) hide
|
||||||
|
(effects (font (size 1 1) (thickness 0.15)))
|
||||||
|
)
|
||||||
|
(fp_text value "Power_in 3.3-15V" (at 0 4.2 90) (layer F.Fab) hide
|
||||||
|
(effects (font (size 1 1) (thickness 0.15)))
|
||||||
|
)
|
||||||
|
(fp_line (start -2.4 -1.3) (end 2.4 -1.3) (layer F.Fab) (width 0.1))
|
||||||
|
(fp_line (start -2.51 0.34) (end -2.51 -1.41) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start -2.51 -1.41) (end -1.06 -1.41) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start -1.06 -1.41) (end -1.06 -2.3) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start 2.51 0.34) (end 2.51 -1.41) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start 2.51 -1.41) (end 1.06 -1.41) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start -2.51 2.56) (end -2.51 3.11) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start -2.51 3.11) (end 2.51 3.11) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start 2.51 3.11) (end 2.51 2.56) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start -2.4 3) (end 2.4 3) (layer F.Fab) (width 0.1))
|
||||||
|
(fp_line (start -2.4 -1.3) (end -2.4 3) (layer F.Fab) (width 0.1))
|
||||||
|
(fp_line (start 2.4 -1.3) (end 2.4 3) (layer F.Fab) (width 0.1))
|
||||||
|
(fp_line (start -2.9 -2.8) (end -2.9 3.5) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start -2.9 3.5) (end 2.9 3.5) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start 2.9 3.5) (end 2.9 -2.8) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start 2.9 -2.8) (end -2.9 -2.8) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start -1 -1.3) (end -0.5 -0.592893) (layer F.Fab) (width 0.1))
|
||||||
|
(fp_line (start -0.5 -0.592893) (end 0 -1.3) (layer F.Fab) (width 0.1))
|
||||||
|
(fp_text user %R (at 0 0.5 90) (layer F.Fab) hide
|
||||||
|
(effects (font (size 1 1) (thickness 0.15)))
|
||||||
|
)
|
||||||
|
(pad 1 smd roundrect (at -0.5 -1.675 270) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
|
||||||
|
(net 2 VCC))
|
||||||
|
(pad 2 smd roundrect (at 0.5 -1.675 270) (size 0.6 1.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
|
||||||
|
(net 1 GND))
|
||||||
|
(pad MP smd roundrect (at -1.95 1.45 270) (size 0.9 1.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
|
||||||
|
(pad MP smd roundrect (at 1.95 1.45 270) (size 0.9 1.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
|
||||||
|
(model ${KISYS3DMOD}/Connector_JST.3dshapes/JST_SHL_SM02B-SHLS-TF_1x02-1MP_P1.00mm_Horizontal.wrl
|
||||||
|
(at (xyz 0 0 0))
|
||||||
|
(scale (xyz 1 1 1))
|
||||||
|
(rotate (xyz 0 0 0))
|
||||||
|
)
|
||||||
|
)
|
||||||
|
|
||||||
|
(module TestPoint:TestPoint_Pad_2.5x2.5mm (layer F.Cu) (tedit 5A0F774F) (tstamp 5FBEEA58)
|
||||||
|
(at 174.2948 34.5694)
|
||||||
|
(descr "SMD rectangular pad as test Point, square 2.5mm side length")
|
||||||
|
(tags "test point SMD pad rectangle square")
|
||||||
|
(path /5FAD88E0)
|
||||||
|
(attr virtual)
|
||||||
|
(fp_text reference - (at 0 -2.148) (layer F.SilkS)
|
||||||
|
(effects (font (size 1 1) (thickness 0.15)))
|
||||||
|
)
|
||||||
|
(fp_text value "Vin GND" (at 0 2.25) (layer F.Fab) hide
|
||||||
|
(effects (font (size 1 1) (thickness 0.15)))
|
||||||
|
)
|
||||||
|
(fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_text user %R (at 0 -2.15) (layer F.Fab)
|
||||||
|
(effects (font (size 1 1) (thickness 0.15)))
|
||||||
|
)
|
||||||
|
(pad 1 smd rect (at 0 0) (size 2.5 2.5) (layers F.Cu F.Mask)
|
||||||
|
(net 1 GND))
|
||||||
|
)
|
||||||
|
|
||||||
|
(module TestPoint:TestPoint_Pad_2.5x2.5mm (layer F.Cu) (tedit 5A0F774F) (tstamp 5FBEEA66)
|
||||||
|
(at 169.2656 34.5694)
|
||||||
|
(descr "SMD rectangular pad as test Point, square 2.5mm side length")
|
||||||
|
(tags "test point SMD pad rectangle square")
|
||||||
|
(path /5FAD8C7D)
|
||||||
|
(attr virtual)
|
||||||
|
(fp_text reference + (at 0 -2.148) (layer F.SilkS)
|
||||||
|
(effects (font (size 1 1) (thickness 0.15)))
|
||||||
|
)
|
||||||
|
(fp_text value "Vin 3.3V-15V" (at 0 2.25) (layer F.Fab) hide
|
||||||
|
(effects (font (size 1 1) (thickness 0.15)))
|
||||||
|
)
|
||||||
|
(fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_text user %R (at 0 -2.15) (layer F.Fab) hide
|
||||||
|
(effects (font (size 1 1) (thickness 0.15)))
|
||||||
|
)
|
||||||
|
(pad 1 smd rect (at 0 0) (size 2.5 2.5) (layers F.Cu F.Mask)
|
||||||
|
(net 2 VCC))
|
||||||
|
)
|
||||||
|
|
||||||
|
(module TestPoint:TestPoint_Plated_Hole_D2.0mm (layer F.Cu) (tedit 5A0F774F) (tstamp 5FF6761A)
|
||||||
|
(at 174.9425 48.895)
|
||||||
|
(descr "Plated Hole as test Point, diameter 2.0mm")
|
||||||
|
(tags "test point plated hole")
|
||||||
|
(path /5FAC76A2)
|
||||||
|
(attr virtual)
|
||||||
|
(fp_text reference J2.2 (at 0 -2.498) (layer F.SilkS) hide
|
||||||
|
(effects (font (size 1 1) (thickness 0.15)))
|
||||||
|
)
|
||||||
|
(fp_text value "Vout GND" (at 0 2.45) (layer F.Fab) hide
|
||||||
|
(effects (font (size 1 1) (thickness 0.15)))
|
||||||
|
)
|
||||||
|
(fp_circle (center 0 0) (end 0 -1.7) (layer F.SilkS) (width 0.12))
|
||||||
|
(fp_circle (center 0 0) (end 1.8 0) (layer F.CrtYd) (width 0.05))
|
||||||
|
(fp_text user %R (at 0 -2.5) (layer F.Fab)
|
||||||
|
(effects (font (size 1 1) (thickness 0.15)))
|
||||||
|
)
|
||||||
|
(pad 1 thru_hole circle (at 0 0) (size 3 3) (drill 2) (layers *.Cu *.Mask)
|
||||||
|
(net 1 GND))
|
||||||
|
)
|
||||||
|
|
||||||
|
(gr_text + (at 176.7332 33.782) (layer F.SilkS) (tstamp 5FE20866)
|
||||||
|
(effects (font (size 0.75 0.75) (thickness 0.075)))
|
||||||
|
)
|
||||||
|
(gr_text - (at 176.7332 35.7759) (layer F.SilkS) (tstamp 5FE20859)
|
||||||
|
(effects (font (size 0.75 0.75) (thickness 0.075)))
|
||||||
|
)
|
||||||
|
(gr_text "+ 3.3V" (at 174.8282 19.685) (layer F.SilkS) (tstamp 5FBF1954)
|
||||||
|
(effects (font (size 0.75 0.75) (thickness 0.075)))
|
||||||
|
)
|
||||||
|
(gr_text GND (at 174.8282 51.3588) (layer F.SilkS)
|
||||||
|
(effects (font (size 0.75 0.75) (thickness 0.075)))
|
||||||
|
)
|
||||||
|
(gr_text "powerpack \nv1.0\nattno.de" (at 170.053 27.2796) (layer F.SilkS)
|
||||||
|
(effects (font (size 0.75 0.75) (thickness 0.1)))
|
||||||
|
)
|
||||||
|
(gr_text "3.3-15V DC" (at 171.7675 31.0515) (layer F.SilkS)
|
||||||
|
(effects (font (size 0.75 0.75) (thickness 0.1)))
|
||||||
|
)
|
||||||
|
(gr_line (start 172.6184 23.9522) (end 168.275 23.9522) (layer Edge.Cuts) (width 0.1))
|
||||||
|
(gr_line (start 172.6184 19.0246) (end 172.6184 23.9522) (layer Edge.Cuts) (width 0.1))
|
||||||
|
(gr_line (start 177.2158 19.0246) (end 172.6184 19.0246) (layer Edge.Cuts) (width 0.1))
|
||||||
|
(gr_line (start 177.2158 23.9522) (end 177.2158 19.0246) (layer Edge.Cuts) (width 0.1))
|
||||||
|
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(xy 173.278 50.121594) (xy 173.450847 50.207048) (xy 174.762895 48.895) (xy 173.450847 47.582952) (xy 173.278 47.668406)
|
||||||
|
(xy 173.278 47.403347) (xy 173.630452 47.403347) (xy 174.9425 48.715395) (xy 176.254548 47.403347) (xy 176.098538 47.087786)
|
||||||
|
(xy 175.723755 46.89698) (xy 175.318949 46.782956) (xy 174.899676 46.750098) (xy 174.482049 46.799666) (xy 174.082117 46.929757)
|
||||||
|
(xy 173.786462 47.087786) (xy 173.630452 47.403347) (xy 173.278 47.403347) (xy 173.278 46.972846) (xy 173.281314 46.9392)
|
||||||
|
(xy 173.268088 46.804917) (xy 173.228919 46.675794) (xy 173.165312 46.556793) (xy 173.079711 46.452489) (xy 172.975407 46.366888)
|
||||||
|
(xy 172.856406 46.303281) (xy 172.727283 46.264112) (xy 172.626647 46.2542) (xy 172.593 46.250886) (xy 172.559353 46.2542)
|
||||||
|
(xy 167.182 46.2542) (xy 167.182 45.2018) (xy 179.461928 45.2018) (xy 179.474188 45.326282) (xy 179.510498 45.44598)
|
||||||
|
(xy 179.569463 45.556294) (xy 179.648815 45.652985) (xy 179.745506 45.732337) (xy 179.85582 45.791302) (xy 179.975518 45.827612)
|
||||||
|
(xy 180.1 45.839872) (xy 180.71425 45.8368) (xy 180.873 45.67805) (xy 180.873 44.6663) (xy 181.127 44.6663)
|
||||||
|
(xy 181.127 45.67805) (xy 181.28575 45.8368) (xy 181.9 45.839872) (xy 182.024482 45.827612) (xy 182.14418 45.791302)
|
||||||
|
(xy 182.254494 45.732337) (xy 182.351185 45.652985) (xy 182.430537 45.556294) (xy 182.489502 45.44598) (xy 182.525812 45.326282)
|
||||||
|
(xy 182.538072 45.2018) (xy 182.535 44.82505) (xy 182.37625 44.6663) (xy 181.127 44.6663) (xy 180.873 44.6663)
|
||||||
|
(xy 179.62375 44.6663) (xy 179.465 44.82505) (xy 179.461928 45.2018) (xy 167.182 45.2018) (xy 167.182 43.8768)
|
||||||
|
(xy 179.461928 43.8768) (xy 179.465 44.25355) (xy 179.62375 44.4123) (xy 180.873 44.4123) (xy 180.873 43.40055)
|
||||||
|
(xy 181.127 43.40055) (xy 181.127 44.4123) (xy 182.37625 44.4123) (xy 182.535 44.25355) (xy 182.538072 43.8768)
|
||||||
|
(xy 182.525812 43.752318) (xy 182.489502 43.63262) (xy 182.430537 43.522306) (xy 182.351185 43.425615) (xy 182.254494 43.346263)
|
||||||
|
(xy 182.14418 43.287298) (xy 182.024482 43.250988) (xy 181.9 43.238728) (xy 181.28575 43.2418) (xy 181.127 43.40055)
|
||||||
|
(xy 180.873 43.40055) (xy 180.71425 43.2418) (xy 180.1 43.238728) (xy 179.975518 43.250988) (xy 179.85582 43.287298)
|
||||||
|
(xy 179.745506 43.346263) (xy 179.648815 43.425615) (xy 179.569463 43.522306) (xy 179.510498 43.63262) (xy 179.474188 43.752318)
|
||||||
|
(xy 179.461928 43.8768) (xy 167.182 43.8768) (xy 167.182 25.991427) (xy 168.361781 24.8285) (xy 174.182501 24.8285)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(zone (net 3) (net_name +3V3) (layer F.Cu) (tstamp 5FF61D7A) (hatch edge 0.508)
|
||||||
|
(connect_pads (clearance 0.508))
|
||||||
|
(min_thickness 0.254)
|
||||||
|
(fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
|
||||||
|
(polygon
|
||||||
|
(pts
|
||||||
|
(xy 179.8066 18.034) (xy 177.546 23.749) (xy 172.466 23.749) (xy 168.783 17.9578)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(filled_polygon
|
||||||
|
(pts
|
||||||
|
(xy 176.530801 20.643234) (xy 176.434153 20.595452) (xy 175.122105 21.9075) (xy 176.434153 23.219548) (xy 176.5308 23.171767)
|
||||||
|
(xy 176.5308 23.622) (xy 176.144375 23.622) (xy 176.254548 23.399153) (xy 174.9425 22.087105) (xy 173.630452 23.399153)
|
||||||
|
(xy 173.740625 23.622) (xy 173.3034 23.622) (xy 173.3034 23.146652) (xy 173.450847 23.219548) (xy 174.762895 21.9075)
|
||||||
|
(xy 173.450847 20.595452) (xy 173.3034 20.668348) (xy 173.3034 20.415847) (xy 173.630452 20.415847) (xy 174.9425 21.727895)
|
||||||
|
(xy 176.254548 20.415847) (xy 176.098538 20.100286) (xy 175.723755 19.90948) (xy 175.318949 19.795456) (xy 174.899676 19.762598)
|
||||||
|
(xy 174.482049 19.812166) (xy 174.082117 19.942257) (xy 173.786462 20.100286) (xy 173.630452 20.415847) (xy 173.3034 20.415847)
|
||||||
|
(xy 173.3034 19.7096) (xy 176.530801 19.7096)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
)
|
||||||
148
powerpack.net
Normal file
148
powerpack.net
Normal file
|
|
@ -0,0 +1,148 @@
|
||||||
|
(export (version D)
|
||||||
|
(design
|
||||||
|
(source /data/Git/iot/powerpack/powerpack.sch)
|
||||||
|
(date "Mi 06 Jan 2021 21:17:03 CET")
|
||||||
|
(tool "Eeschema 5.1.9")
|
||||||
|
(sheet (number 1) (name /) (tstamps /)
|
||||||
|
(title_block
|
||||||
|
(title)
|
||||||
|
(company)
|
||||||
|
(rev)
|
||||||
|
(date)
|
||||||
|
(source powerpack.sch)
|
||||||
|
(comment (number 1) (value ""))
|
||||||
|
(comment (number 2) (value ""))
|
||||||
|
(comment (number 3) (value ""))
|
||||||
|
(comment (number 4) (value "")))))
|
||||||
|
(components
|
||||||
|
(comp (ref C2)
|
||||||
|
(value 1uF)
|
||||||
|
(footprint Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder)
|
||||||
|
(datasheet ~)
|
||||||
|
(libsource (lib Device) (part C) (description "Unpolarized capacitor"))
|
||||||
|
(sheetpath (names /) (tstamps /))
|
||||||
|
(tstamp 5FAB0019))
|
||||||
|
(comp (ref J2.2)
|
||||||
|
(value "Vout GND")
|
||||||
|
(footprint TestPoint:TestPoint_Plated_Hole_D2.0mm)
|
||||||
|
(datasheet ~)
|
||||||
|
(libsource (lib Connector) (part Conn_01x01_Female) (description "Generic connector, single row, 01x01, script generated (kicad-library-utils/schlib/autogen/connector/)"))
|
||||||
|
(sheetpath (names /) (tstamps /))
|
||||||
|
(tstamp 5FAC76A2))
|
||||||
|
(comp (ref J2.1)
|
||||||
|
(value "Vout +3.3V")
|
||||||
|
(footprint TestPoint:TestPoint_Plated_Hole_D2.0mm)
|
||||||
|
(datasheet ~)
|
||||||
|
(libsource (lib Connector) (part Conn_01x01_Female) (description "Generic connector, single row, 01x01, script generated (kicad-library-utils/schlib/autogen/connector/)"))
|
||||||
|
(sheetpath (names /) (tstamps /))
|
||||||
|
(tstamp 5FAC7D6D))
|
||||||
|
(comp (ref C1)
|
||||||
|
(value 1uF)
|
||||||
|
(footprint Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder)
|
||||||
|
(datasheet ~)
|
||||||
|
(libsource (lib Device) (part C) (description "Unpolarized capacitor"))
|
||||||
|
(sheetpath (names /) (tstamps /))
|
||||||
|
(tstamp 5FAAF5EB))
|
||||||
|
(comp (ref J1)
|
||||||
|
(value "Power_in 3.3-15V")
|
||||||
|
(footprint Connector_JST:JST_SHL_SM02B-SHLS-TF_1x02-1MP_P1.00mm_Horizontal)
|
||||||
|
(datasheet ~)
|
||||||
|
(libsource (lib Connector) (part Conn_01x02_Male) (description "Generic connector, single row, 01x02, script generated (kicad-library-utils/schlib/autogen/connector/)"))
|
||||||
|
(sheetpath (names /) (tstamps /))
|
||||||
|
(tstamp 5FAC5355))
|
||||||
|
(comp (ref J3.2)
|
||||||
|
(value "Vin GND")
|
||||||
|
(footprint TestPoint:TestPoint_Pad_2.5x2.5mm)
|
||||||
|
(datasheet ~)
|
||||||
|
(libsource (lib Connector) (part Conn_01x01_Female) (description "Generic connector, single row, 01x01, script generated (kicad-library-utils/schlib/autogen/connector/)"))
|
||||||
|
(sheetpath (names /) (tstamps /))
|
||||||
|
(tstamp 5FAD88E0))
|
||||||
|
(comp (ref J3.1)
|
||||||
|
(value "Vin 3.3V-15V")
|
||||||
|
(footprint TestPoint:TestPoint_Pad_2.5x2.5mm)
|
||||||
|
(datasheet ~)
|
||||||
|
(libsource (lib Connector) (part Conn_01x01_Female) (description "Generic connector, single row, 01x01, script generated (kicad-library-utils/schlib/autogen/connector/)"))
|
||||||
|
(sheetpath (names /) (tstamps /))
|
||||||
|
(tstamp 5FAD8C7D))
|
||||||
|
(comp (ref U1)
|
||||||
|
(value MCP1703T-3302E_CB)
|
||||||
|
(footprint MCP1703T-3302E_CB:SOT95P255X145-3N)
|
||||||
|
(fields
|
||||||
|
(field (name MPN) MCP1703T-3302E/CB)
|
||||||
|
(field (name OC_FARNELL) 1439518)
|
||||||
|
(field (name OC_NEWARK) 40M0637)
|
||||||
|
(field (name PACKAGE) SOT-3)
|
||||||
|
(field (name SUPPLIER) Microchip))
|
||||||
|
(libsource (lib MCP1703) (part MCP1703T-3302E_CB) (description ""))
|
||||||
|
(sheetpath (names /) (tstamps /))
|
||||||
|
(tstamp 5FBEA257)))
|
||||||
|
(libparts
|
||||||
|
(libpart (lib Connector) (part Conn_01x01_Female)
|
||||||
|
(description "Generic connector, single row, 01x01, script generated (kicad-library-utils/schlib/autogen/connector/)")
|
||||||
|
(docs ~)
|
||||||
|
(footprints
|
||||||
|
(fp Connector*:*))
|
||||||
|
(fields
|
||||||
|
(field (name Reference) J)
|
||||||
|
(field (name Value) Conn_01x01_Female))
|
||||||
|
(pins
|
||||||
|
(pin (num 1) (name Pin_1) (type passive))))
|
||||||
|
(libpart (lib Connector) (part Conn_01x02_Male)
|
||||||
|
(description "Generic connector, single row, 01x02, script generated (kicad-library-utils/schlib/autogen/connector/)")
|
||||||
|
(docs ~)
|
||||||
|
(footprints
|
||||||
|
(fp Connector*:*_1x??_*))
|
||||||
|
(fields
|
||||||
|
(field (name Reference) J)
|
||||||
|
(field (name Value) Conn_01x02_Male))
|
||||||
|
(pins
|
||||||
|
(pin (num 1) (name Pin_1) (type passive))
|
||||||
|
(pin (num 2) (name Pin_2) (type passive))))
|
||||||
|
(libpart (lib Device) (part C)
|
||||||
|
(description "Unpolarized capacitor")
|
||||||
|
(docs ~)
|
||||||
|
(footprints
|
||||||
|
(fp C_*))
|
||||||
|
(fields
|
||||||
|
(field (name Reference) C)
|
||||||
|
(field (name Value) C))
|
||||||
|
(pins
|
||||||
|
(pin (num 1) (name ~) (type passive))
|
||||||
|
(pin (num 2) (name ~) (type passive))))
|
||||||
|
(libpart (lib MCP1703) (part MCP1703T-3302E_CB)
|
||||||
|
(fields
|
||||||
|
(field (name Reference) U)
|
||||||
|
(field (name Value) MCP1703T-3302E_CB)
|
||||||
|
(field (name Footprint) SOT95P255X145-3N)
|
||||||
|
(field (name MANUFACTURER) Microchip)
|
||||||
|
(field (name PARTREV) F)
|
||||||
|
(field (name STANDARD) "IPC 7351B")
|
||||||
|
(field (name MAXIMUM_PACKAGE_HEIGHT) "1.45 mm"))
|
||||||
|
(pins
|
||||||
|
(pin (num 1) (name GND) (type power_in))
|
||||||
|
(pin (num 2) (name VOUT) (type output))
|
||||||
|
(pin (num 3) (name VIN) (type input)))))
|
||||||
|
(libraries
|
||||||
|
(library (logical Connector)
|
||||||
|
(uri /usr/share/kicad/library/Connector.lib))
|
||||||
|
(library (logical Device)
|
||||||
|
(uri /usr/share/kicad/library/Device.lib))
|
||||||
|
(library (logical MCP1703)
|
||||||
|
(uri /data/Git/iot/powerpack/footprints/MCP1703T-3302E_CB/MCP1703T-3302E_CB.lib)))
|
||||||
|
(nets
|
||||||
|
(net (code 1) (name GND)
|
||||||
|
(node (ref C1) (pin 2))
|
||||||
|
(node (ref J1) (pin 2))
|
||||||
|
(node (ref J2.2) (pin 1))
|
||||||
|
(node (ref C2) (pin 2))
|
||||||
|
(node (ref U1) (pin 1))
|
||||||
|
(node (ref J3.2) (pin 1)))
|
||||||
|
(net (code 2) (name +3V3)
|
||||||
|
(node (ref J2.1) (pin 1))
|
||||||
|
(node (ref C2) (pin 1))
|
||||||
|
(node (ref U1) (pin 2)))
|
||||||
|
(net (code 3) (name VCC)
|
||||||
|
(node (ref U1) (pin 3))
|
||||||
|
(node (ref J1) (pin 1))
|
||||||
|
(node (ref C1) (pin 1))
|
||||||
|
(node (ref J3.1) (pin 1)))))
|
||||||
248
powerpack.pro
Normal file
248
powerpack.pro
Normal file
|
|
@ -0,0 +1,248 @@
|
||||||
|
update=25.11.2020 19:32:24
|
||||||
|
version=1
|
||||||
|
last_client=pcbnew
|
||||||
|
[general]
|
||||||
|
version=1
|
||||||
|
RootSch=
|
||||||
|
BoardNm=
|
||||||
|
[cvpcb]
|
||||||
|
version=1
|
||||||
|
NetIExt=net
|
||||||
|
[eeschema]
|
||||||
|
version=1
|
||||||
|
LibDir=
|
||||||
|
[eeschema/libraries]
|
||||||
|
[schematic_editor]
|
||||||
|
version=1
|
||||||
|
PageLayoutDescrFile=
|
||||||
|
PlotDirectoryName=
|
||||||
|
SubpartIdSeparator=0
|
||||||
|
SubpartFirstId=65
|
||||||
|
NetFmtName=Pcbnew
|
||||||
|
SpiceAjustPassiveValues=0
|
||||||
|
LabSize=50
|
||||||
|
ERC_TestSimilarLabels=1
|
||||||
|
[pcbnew]
|
||||||
|
version=1
|
||||||
|
PageLayoutDescrFile=
|
||||||
|
LastNetListRead=Huckelpack_sml.net
|
||||||
|
CopperLayerCount=2
|
||||||
|
BoardThickness=1.6
|
||||||
|
AllowMicroVias=0
|
||||||
|
AllowBlindVias=0
|
||||||
|
RequireCourtyardDefinitions=0
|
||||||
|
ProhibitOverlappingCourtyards=1
|
||||||
|
MinTrackWidth=0.2
|
||||||
|
MinViaDiameter=0.4
|
||||||
|
MinViaDrill=0.3
|
||||||
|
MinMicroViaDiameter=0.2
|
||||||
|
MinMicroViaDrill=0.09999999999999999
|
||||||
|
MinHoleToHole=0.25
|
||||||
|
TrackWidth1=0.25
|
||||||
|
ViaDiameter1=0.8
|
||||||
|
ViaDrill1=0.4
|
||||||
|
dPairWidth1=0.2
|
||||||
|
dPairGap1=0.25
|
||||||
|
dPairViaGap1=0.25
|
||||||
|
SilkLineWidth=0.15
|
||||||
|
SilkTextSizeV=1
|
||||||
|
SilkTextSizeH=1
|
||||||
|
SilkTextSizeThickness=0.15
|
||||||
|
SilkTextItalic=0
|
||||||
|
SilkTextUpright=1
|
||||||
|
CopperLineWidth=0.2
|
||||||
|
CopperTextSizeV=1.5
|
||||||
|
CopperTextSizeH=1.5
|
||||||
|
CopperTextThickness=0.3
|
||||||
|
CopperTextItalic=0
|
||||||
|
CopperTextUpright=1
|
||||||
|
EdgeCutLineWidth=0.09999999999999999
|
||||||
|
CourtyardLineWidth=0.12
|
||||||
|
OthersLineWidth=0.15
|
||||||
|
OthersTextSizeV=1
|
||||||
|
OthersTextSizeH=1
|
||||||
|
OthersTextSizeThickness=0.15
|
||||||
|
OthersTextItalic=0
|
||||||
|
OthersTextUpright=1
|
||||||
|
SolderMaskClearance=0
|
||||||
|
SolderMaskMinWidth=0
|
||||||
|
SolderPasteClearance=0
|
||||||
|
SolderPasteRatio=0
|
||||||
|
[pcbnew/Layer.F.Cu]
|
||||||
|
Name=F.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.In1.Cu]
|
||||||
|
Name=In1.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In2.Cu]
|
||||||
|
Name=In2.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In3.Cu]
|
||||||
|
Name=In3.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In4.Cu]
|
||||||
|
Name=In4.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In5.Cu]
|
||||||
|
Name=In5.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In6.Cu]
|
||||||
|
Name=In6.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In7.Cu]
|
||||||
|
Name=In7.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In8.Cu]
|
||||||
|
Name=In8.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In9.Cu]
|
||||||
|
Name=In9.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In10.Cu]
|
||||||
|
Name=In10.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In11.Cu]
|
||||||
|
Name=In11.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In12.Cu]
|
||||||
|
Name=In12.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In13.Cu]
|
||||||
|
Name=In13.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In14.Cu]
|
||||||
|
Name=In14.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In15.Cu]
|
||||||
|
Name=In15.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In16.Cu]
|
||||||
|
Name=In16.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In17.Cu]
|
||||||
|
Name=In17.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In18.Cu]
|
||||||
|
Name=In18.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In19.Cu]
|
||||||
|
Name=In19.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In20.Cu]
|
||||||
|
Name=In20.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In21.Cu]
|
||||||
|
Name=In21.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In22.Cu]
|
||||||
|
Name=In22.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In23.Cu]
|
||||||
|
Name=In23.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In24.Cu]
|
||||||
|
Name=In24.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In25.Cu]
|
||||||
|
Name=In25.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In26.Cu]
|
||||||
|
Name=In26.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In27.Cu]
|
||||||
|
Name=In27.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In28.Cu]
|
||||||
|
Name=In28.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In29.Cu]
|
||||||
|
Name=In29.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.In30.Cu]
|
||||||
|
Name=In30.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=0
|
||||||
|
[pcbnew/Layer.B.Cu]
|
||||||
|
Name=B.Cu
|
||||||
|
Type=0
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.B.Adhes]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.F.Adhes]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.B.Paste]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.F.Paste]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.B.SilkS]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.F.SilkS]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.B.Mask]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.F.Mask]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.Dwgs.User]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.Cmts.User]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.Eco1.User]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.Eco2.User]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.Edge.Cuts]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.Margin]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.B.CrtYd]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.F.CrtYd]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.B.Fab]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.F.Fab]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Layer.Rescue]
|
||||||
|
Enabled=1
|
||||||
|
[pcbnew/Netclasses]
|
||||||
|
[pcbnew/Netclasses/Default]
|
||||||
|
Name=Default
|
||||||
|
Clearance=0.2
|
||||||
|
TrackWidth=0.25
|
||||||
|
ViaDiameter=0.8
|
||||||
|
ViaDrill=0.4
|
||||||
|
uViaDiameter=0.3
|
||||||
|
uViaDrill=0.1
|
||||||
|
dPairWidth=0.2
|
||||||
|
dPairGap=0.25
|
||||||
|
dPairViaGap=0.25
|
||||||
231
powerpack.sch
Normal file
231
powerpack.sch
Normal file
|
|
@ -0,0 +1,231 @@
|
||||||
|
EESchema Schematic File Version 4
|
||||||
|
EELAYER 30 0
|
||||||
|
EELAYER END
|
||||||
|
$Descr A4 11693 8268
|
||||||
|
encoding utf-8
|
||||||
|
Sheet 1 1
|
||||||
|
Title ""
|
||||||
|
Date ""
|
||||||
|
Rev ""
|
||||||
|
Comp ""
|
||||||
|
Comment1 ""
|
||||||
|
Comment2 ""
|
||||||
|
Comment3 ""
|
||||||
|
Comment4 ""
|
||||||
|
$EndDescr
|
||||||
|
$Comp
|
||||||
|
L Device:C C2
|
||||||
|
U 1 1 5FAB0019
|
||||||
|
P 4250 1700
|
||||||
|
F 0 "C2" H 4365 1746 50 0000 L CNN
|
||||||
|
F 1 "1uF" H 4365 1655 50 0000 L CNN
|
||||||
|
F 2 "Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder" H 4288 1550 50 0001 C CNN
|
||||||
|
F 3 "~" H 4250 1700 50 0001 C CNN
|
||||||
|
1 4250 1700
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L power:GND #PWR03
|
||||||
|
U 1 1 5FAB223E
|
||||||
|
P 4250 2000
|
||||||
|
F 0 "#PWR03" H 4250 1750 50 0001 C CNN
|
||||||
|
F 1 "GND" H 4255 1827 50 0000 C CNN
|
||||||
|
F 2 "" H 4250 2000 50 0001 C CNN
|
||||||
|
F 3 "" H 4250 2000 50 0001 C CNN
|
||||||
|
1 4250 2000
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L power:+3.3V #PWR04
|
||||||
|
U 1 1 5FAB33EB
|
||||||
|
P 4250 1300
|
||||||
|
F 0 "#PWR04" H 4250 1150 50 0001 C CNN
|
||||||
|
F 1 "+3.3V" H 4265 1473 50 0000 C CNN
|
||||||
|
F 2 "" H 4250 1300 50 0001 C CNN
|
||||||
|
F 3 "" H 4250 1300 50 0001 C CNN
|
||||||
|
1 4250 1300
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
Connection ~ 4250 1550
|
||||||
|
$Comp
|
||||||
|
L Connector:Conn_01x01_Female J2.2
|
||||||
|
U 1 1 5FAC76A2
|
||||||
|
P 4750 1850
|
||||||
|
F 0 "J2.2" H 4778 1876 50 0000 L CNN
|
||||||
|
F 1 "Vout GND" H 4778 1785 50 0000 L CNN
|
||||||
|
F 2 "TestPoint:TestPoint_Plated_Hole_D2.0mm" H 4750 1850 50 0001 C CNN
|
||||||
|
F 3 "~" H 4750 1850 50 0001 C CNN
|
||||||
|
1 4750 1850
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L Connector:Conn_01x01_Female J2.1
|
||||||
|
U 1 1 5FAC7D6D
|
||||||
|
P 4750 1550
|
||||||
|
F 0 "J2.1" H 4778 1576 50 0000 L CNN
|
||||||
|
F 1 "Vout +3.3V" H 4778 1485 50 0000 L CNN
|
||||||
|
F 2 "TestPoint:TestPoint_Plated_Hole_D2.0mm" H 4750 1550 50 0001 C CNN
|
||||||
|
F 3 "~" H 4750 1550 50 0001 C CNN
|
||||||
|
1 4750 1550
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
Connection ~ 1300 1550
|
||||||
|
Wire Wire Line
|
||||||
|
1300 1300 1300 1550
|
||||||
|
Wire Wire Line
|
||||||
|
1300 1550 1600 1550
|
||||||
|
$Comp
|
||||||
|
L Device:C C1
|
||||||
|
U 1 1 5FAAF5EB
|
||||||
|
P 2050 1700
|
||||||
|
F 0 "C1" H 2165 1746 50 0000 L CNN
|
||||||
|
F 1 "1uF" H 2165 1655 50 0000 L CNN
|
||||||
|
F 2 "Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder" H 2088 1550 50 0001 C CNN
|
||||||
|
F 3 "~" H 2050 1700 50 0001 C CNN
|
||||||
|
1 2050 1700
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
Wire Wire Line
|
||||||
|
1300 1750 1300 1550
|
||||||
|
Wire Wire Line
|
||||||
|
2050 1850 1500 1850
|
||||||
|
$Comp
|
||||||
|
L Connector:Conn_01x02_Male J1
|
||||||
|
U 1 1 5FAC5355
|
||||||
|
P 1100 1750
|
||||||
|
F 0 "J1" H 1208 1931 50 0000 C CNN
|
||||||
|
F 1 "Power_in 3.3-15V" H 1208 1840 50 0000 C CNN
|
||||||
|
F 2 "Connector_JST:JST_SHL_SM02B-SHLS-TF_1x02-1MP_P1.00mm_Horizontal" H 1100 1750 50 0001 C CNN
|
||||||
|
F 3 "~" H 1100 1750 50 0001 C CNN
|
||||||
|
1 1100 1750
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L power:GND #PWR02
|
||||||
|
U 1 1 5FAB1C6B
|
||||||
|
P 2050 2000
|
||||||
|
F 0 "#PWR02" H 2050 1750 50 0001 C CNN
|
||||||
|
F 1 "GND" H 2055 1827 50 0000 C CNN
|
||||||
|
F 2 "" H 2050 2000 50 0001 C CNN
|
||||||
|
F 3 "" H 2050 2000 50 0001 C CNN
|
||||||
|
1 2050 2000
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L power:VCC #PWR01
|
||||||
|
U 1 1 5FAB2D0B
|
||||||
|
P 1300 1300
|
||||||
|
F 0 "#PWR01" H 1300 1150 50 0001 C CNN
|
||||||
|
F 1 "VCC" H 1315 1473 50 0000 C CNN
|
||||||
|
F 2 "" H 1300 1300 50 0001 C CNN
|
||||||
|
F 3 "" H 1300 1300 50 0001 C CNN
|
||||||
|
1 1300 1300
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L power:PWR_FLAG #FLG0101
|
||||||
|
U 1 1 5FACDAC2
|
||||||
|
P 1300 1300
|
||||||
|
F 0 "#FLG0101" H 1300 1375 50 0001 C CNN
|
||||||
|
F 1 "PWR_FLAG" V 1300 1428 50 0000 L CNN
|
||||||
|
F 2 "" H 1300 1300 50 0001 C CNN
|
||||||
|
F 3 "~" H 1300 1300 50 0001 C CNN
|
||||||
|
1 1300 1300
|
||||||
|
0 1 1 0
|
||||||
|
$EndComp
|
||||||
|
Connection ~ 1300 1300
|
||||||
|
$Comp
|
||||||
|
L power:PWR_FLAG #FLG0102
|
||||||
|
U 1 1 5FACE267
|
||||||
|
P 2050 2000
|
||||||
|
F 0 "#FLG0102" H 2050 2075 50 0001 C CNN
|
||||||
|
F 1 "PWR_FLAG" V 2050 2127 50 0000 L CNN
|
||||||
|
F 2 "" H 2050 2000 50 0001 C CNN
|
||||||
|
F 3 "~" H 2050 2000 50 0001 C CNN
|
||||||
|
1 2050 2000
|
||||||
|
0 -1 -1 0
|
||||||
|
$EndComp
|
||||||
|
Wire Wire Line
|
||||||
|
2050 1850 2050 2000
|
||||||
|
Connection ~ 2050 1850
|
||||||
|
Connection ~ 2050 2000
|
||||||
|
Wire Wire Line
|
||||||
|
4250 1300 4250 1550
|
||||||
|
Wire Wire Line
|
||||||
|
4550 1850 4250 1850
|
||||||
|
Wire Wire Line
|
||||||
|
4550 1550 4250 1550
|
||||||
|
Wire Wire Line
|
||||||
|
4250 2000 4250 1850
|
||||||
|
Connection ~ 4250 1850
|
||||||
|
$Comp
|
||||||
|
L power:GND #PWR0101
|
||||||
|
U 1 1 5FAE2638
|
||||||
|
P 3900 2000
|
||||||
|
F 0 "#PWR0101" H 3900 1750 50 0001 C CNN
|
||||||
|
F 1 "GND" H 3905 1827 50 0000 C CNN
|
||||||
|
F 2 "" H 3900 2000 50 0001 C CNN
|
||||||
|
F 3 "" H 3900 2000 50 0001 C CNN
|
||||||
|
1 3900 2000
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L Connector:Conn_01x01_Female J3.2
|
||||||
|
U 1 1 5FAD88E0
|
||||||
|
P 1050 2300
|
||||||
|
F 0 "J3.2" H 1078 2326 50 0000 L CNN
|
||||||
|
F 1 "Vin GND" H 1078 2235 50 0000 L CNN
|
||||||
|
F 2 "TestPoint:TestPoint_Pad_2.5x2.5mm" H 1050 2300 50 0001 C CNN
|
||||||
|
F 3 "~" H 1050 2300 50 0001 C CNN
|
||||||
|
1 1050 2300
|
||||||
|
-1 0 0 1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L Connector:Conn_01x01_Female J3.1
|
||||||
|
U 1 1 5FAD8C7D
|
||||||
|
P 1050 2100
|
||||||
|
F 0 "J3.1" H 1078 2126 50 0000 L CNN
|
||||||
|
F 1 "Vin 3.3V-15V" H 1078 2035 50 0000 L CNN
|
||||||
|
F 2 "TestPoint:TestPoint_Pad_2.5x2.5mm" H 1050 2100 50 0001 C CNN
|
||||||
|
F 3 "~" H 1050 2100 50 0001 C CNN
|
||||||
|
1 1050 2100
|
||||||
|
-1 0 0 1
|
||||||
|
$EndComp
|
||||||
|
Wire Wire Line
|
||||||
|
1600 1550 1600 2100
|
||||||
|
Wire Wire Line
|
||||||
|
1600 2100 1250 2100
|
||||||
|
Connection ~ 1600 1550
|
||||||
|
Wire Wire Line
|
||||||
|
1600 1550 2050 1550
|
||||||
|
Wire Wire Line
|
||||||
|
1500 1850 1500 2300
|
||||||
|
Wire Wire Line
|
||||||
|
1500 2300 1250 2300
|
||||||
|
Connection ~ 1500 1850
|
||||||
|
Wire Wire Line
|
||||||
|
1500 1850 1300 1850
|
||||||
|
$Comp
|
||||||
|
L MCP1703:MCP1703T-3302E_CB U1
|
||||||
|
U 1 1 5FBEA257
|
||||||
|
P 3300 1650
|
||||||
|
F 0 "U1" H 3300 2015 50 0000 C CNN
|
||||||
|
F 1 "MCP1703T-3302E_CB" H 3300 1924 50 0000 C CNN
|
||||||
|
F 2 "MCP1703T-3302E_CB:SOT95P255X145-3N" H 3300 1650 50 0001 L BNN
|
||||||
|
F 3 "" H 3300 1650 50 0001 L BNN
|
||||||
|
F 4 "Microchip" H 3300 1650 50 0001 L BNN "SUPPLIER"
|
||||||
|
F 5 "40M0637" H 3300 1650 50 0001 L BNN "OC_NEWARK"
|
||||||
|
F 6 "SOT-3" H 3300 1650 50 0001 L BNN "PACKAGE"
|
||||||
|
F 7 "MCP1703T-3302E/CB" H 3300 1650 50 0001 L BNN "MPN"
|
||||||
|
F 8 "1439518" H 3300 1650 50 0001 L BNN "OC_FARNELL"
|
||||||
|
1 3300 1650
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
Wire Wire Line
|
||||||
|
2700 1550 2050 1550
|
||||||
|
Connection ~ 2050 1550
|
||||||
|
Wire Wire Line
|
||||||
|
3900 1550 4250 1550
|
||||||
|
Wire Wire Line
|
||||||
|
3900 1750 3900 2000
|
||||||
|
$EndSCHEMATC
|
||||||
3
sym-lib-table
Normal file
3
sym-lib-table
Normal file
|
|
@ -0,0 +1,3 @@
|
||||||
|
(sym_lib_table
|
||||||
|
(lib (name MCP1703)(type Legacy)(uri ${KIPRJMOD}/footprints/MCP1703T-3302E_CB/MCP1703T-3302E_CB.lib)(options "")(descr ""))
|
||||||
|
)
|
||||||
Loading…
Reference in a new issue